Design and Verification of the Programming Circuit in an Application-Specific FPGA
Yang ZC; Chen SL; Liu ZL; Yang, ZC, Chinese Acad Sci, Inst Semicond, Beijing 100083, Peoples R China.
2008
会议名称9th International Conference on Solid-State and Integrated-Circuit Technology
会议录名称2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY
页码VOLS 1-4: 2039-2042
会议日期OCT 20-23, 2008
会议地点Beijing, PEOPLES R CHINA
出版地345 E 47TH ST, NEW YORK, NY 10017 USA
出版者IEEE
ISBN978-1-4244-2185-5
部门归属[yang, zhichao; chen, stanley l.; liu, zhongli] chinese acad sci, inst semicond, beijing 100083, peoples r china
摘要In this paper we present a methodology and its implementation for the design and verification of programming circuit used in a family of application-specific FPGAs that share a common architecture. Each member of the family is different either in the types of functional blocks contained or in the number of blocks of each type. The parametrized design methodology is presented here to achieve this goal. Even though our focus is on the programming circuitry that provides the interface between the FPGA core circuit and the external programming hardware, the parametrized design method can be generalized to the design of entire chip for all members in the FPGA family. The method presented here covers the generation of the design RTL files and the support files for synthesis, place-and-route layout and simulations. The proposed method is proven to work smoothly within the complete chip design methodology. We will describe the implementation of this method to the design of the programming circuit in details including the design flow from the behavioral-level design to the final layout as well as the verification. Different package options and different programming modes are included in the description of the design. The circuit design implementation is based on SMIC 0.13-micron CMOS technology.
学科领域微电子学
主办者IEEE Beijing Sect.; Chinese Inst Elect.; IEEE Electron Devices Soc.; IEEE EDS Beijing Chapter.; IEEE Solid State Circuits Soc.; IEEE Circuites & Syst Soc.; IEEE Hong Kong EDS, SSCS Chapter.; IEEE SSCS Beijing Chapter.; Japan Soc Appl Phys.; Elect Div IEEE.; URSI Commiss D.; Inst Elect Engineers Korea.; Assoc Asia Pacific Phys Soc.; Peking Univ, IEEE EDS Student Chapter.
收录类别其他
语种英语
文献类型会议论文
条目标识符http://ir.semi.ac.cn/handle/172111/8302
专题中国科学院半导体研究所(2009年前)
通讯作者Yang, ZC, Chinese Acad Sci, Inst Semicond, Beijing 100083, Peoples R China.
推荐引用方式
GB/T 7714
Yang ZC,Chen SL,Liu ZL,et al. Design and Verification of the Programming Circuit in an Application-Specific FPGA[C]. 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE,2008:VOLS 1-4: 2039-2042.
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