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A Novel Architecture of Vision Chip for Fast Traffic Lane Detection and FPGA Implementation 会议论文
2009 IEEE 8TH INTERNATIONAL CONFERENCE ON ASIC, Changsha, PEOPLES R CHINA, 2009
作者:  Li YJ (Li Yuan-Jin);  Zhang WC (Zhang WanCheng);  Wu NJ (Wu Nan-Jian);  Li, YJ, Chinese Acad Sci, Inst Semicond, State Key Lab Superlattices & Microstruct, Beijing 100083, Peoples R China. E-mail Address: nanjian@red.semi.ac.cn
Adobe PDF(9352Kb)  |  收藏  |  浏览/下载：1824/355  |  提交时间：2010/04/13
Vision Chip  Safety Driving Assist  Lane Detection  Dual-core  Processing Element Array  
Pipeline Architecture and Parallel Computation-Based Real-Time Stereovision Tracking System for Surgical Navigation 会议论文
, Singapore, SINGAPORE, 2009
作者:  Zhou P (Zhou Ping);  Liu Y (Liu Yue);  Wang YT (Wang Yongtian);  Zhou, P, Beijing Inst Technol, Ctr Res Optoelect Informat Technol & Color Engn, Beijing 100081, Peoples R China. 电子邮箱地址: savagezp@hotmail.com
Adobe PDF(656Kb)  |  收藏  |  浏览/下载：1777/490  |  提交时间：2010/04/26
Parallel Processing  
A model of dislocations at the interface of the bonded wafers 会议论文
OPTICAL INTERCONNECTS FOR TELECOMMUNICATION AND DATA COMMUNICATIONS, 4225, BEIJING, PEOPLES R CHINA, NOV 08-10, 2000
作者:  Han WH;  Yu JZ;  Wang LC;  Wei HZ;  Zhang XF;  Wang QM;  Han WH Chinese Acad Sci Inst Semicond State Key Lab Integrated Optoelect POB 912 Beijing 100083 Peoples R China.
Adobe PDF(76Kb)  |  收藏  |  浏览/下载：1533/266  |  提交时间：2010/10/29
Wafer Bonding  Heteroepitaxy  Lattice Mismatch  Edge-like Dislocations  Thermal Stress  60 Degrees Dislocation Lines  Gaas